IEEE Workshop of FPGAs for Custom Computing Machines Announcement

Duncan A. Buell duncan at super.org
Thu Mar 25 14:09:38 EST 1993


                                                           (3/25/93)
         P R O G R A M   A N N O U N C E M E N T   A N D
           C A L L   F O R   P A R T I C I P A T I O N
      IEEE Workshop on FPGAs for Custom Computing Machines
   April 5-7, 1993    The Inn at Napa Valley, Napa, California

************************************************************************
************************************************************************
**                                                                    **
**  NOTE:  This workshop is REGISTERED ALMOST TO THE CAPACITY of      **
**         the meeting rooms.  We MAY NOT BE ABLE to accept           **
**         "new onsite" registrations.  If you plan to attend         **
**         and have not already been in contact with me please        **
**         let me know by email (duncan at super.org) or FAX             **
**         (301-805-7602 during U.S. east coast business hours)       **
**         as soon as possible.  We will take names and guarantee     **
**         places until we are totally full and settle                **
**         registration payment with you at the meeting.              **
**                                                                    **
**                                           Duncan Buell             **
**                                                                    **
************************************************************************
************************************************************************


=====================================================================
                                                           (3/25/93)
         P R O G R A M   A N N O U N C E M E N T   A N D
           C A L L   F O R   P A R T I C I P A T I O N
      IEEE Workshop on FPGAs for Custom Computing Machines
   April 5-7, 1993    The Inn at Napa Valley, Napa, California

                     P R O G R A M
Monday, April 5, 1993
 8:30 am      :  Opening Remarks
 8:45 - 10:15 :  Session: General Architectures I
10:15 - 10:30 :  Break
10:30 - 12:00 :  Session: General Architectures II
12:00 -  1:30 :  Lunch
 1:30 -  3:00 :  Session: Software and Architecture Environments
 3:00 -  3:15 :  Break
 3:15 -  4:45 :  Session: Software Environments

Tuesday, April 6, 1993
 8:30 - 10:00 :  Session: Special Architectures and Arch. Issues I
10:00 - 10:15 :  Break
10:15 - 11:45 :  Session: Special Architectures and Arch. Issues II
11:45 -  1:15 :  Lunch
 1:15 -  2:45 :  Session: Applications I
 2:45 -  3:00 :  Break
 3:00 -  5:00 :  Session: Applications II

 7:30 -  9:30 pm?:  Discussion: How should we program these computers?

Wednesday, April 7, 1993
 8:30 - 10:00 :  Session: Vendors
10:00 - 10:15 :  Break
10:15 - 11:45 :  Discussion: Where do we go from here?
Program ends 11:45 am Wednesday

             S E S S I O N   D E T A I L S
General Architectures I
--------------------------------
"Fine grain parallelism on a MIMD machine using FPGA"
     D. Lavenier, F. Raimbault, IRISA, B. Pottier, S. Rubini,
          U Bretagne Occidentale
"PRISM II: compiler and architecture"
     A. Smith, M. Wazlowski, L. Agarwal, T. Lee, E. Lam,
          P. Athanas, H. Silverman, S. Ghosh, Brown U
"Spyder: a reconfigurable VLIW processor using FPGAs"
     C. Iseli, E. Sanchez, Swiss Fed Inst of Tech, Lausanne

General Architectures II
--------------------------------
"Realising massively concurrent systems on the SPACE machine"
     G. Milne, U Strathclyde
"WASMII: a data driven computer on a virtual hardware"
     X.-P. Ling, H. Amano, Keio U
"Virtual computing"
     S. Casselman, Virtual Computer Corp

=====================================================================
                                                           (3/25/93)

Software and Architecture Environments
-----------------------------------------------------
"A self-reconfiguring processor"
     P. C. French, R. Taylor, U York
"A field programmable accelerator for compiled code applications"
     D. M. Lewis, M. H. van Ierssel, D. H. Wong, U Toronto
"The Anyboard: programming and enhancements"
     D. E. Van den Bout, N Carolina St U

Software Environments
-----------------------------------------------------
"A data-parallel programming model for reconfigurable architectures"
     S. Guccione, M. J. Gonzalez, U Texas
"FPGA programming in a data parallel C"
     M. Gokhale, R. Minnich, Supercomputing Research Center
"The Splash 2 software environment"
     J. M. Arnold, Supercomputing Research Center

Special Architectures and Architectural Issues I
---------------------------------------------------------
"Reconfigurable multi-bit processor for DSP applications
     in statistical physics"
     S. Monaghan, U Essex
"A reconfigurable computer for embedded control applications"
     H.-J. Herpel, N. Wehn, M. Gasteier, M. Glesner, Darmstadt Tech U
"The CM-2X and comparisons on an application"
     S. A. Cuccaro, M. Mascagni, C. F. Reese, Supercomputing Research Center

Special Architectures and Architectural Issues II
---------------------------------------------------------
"High performance analysis and control of complex systems
     in dynamically reconfigurable silicon"
     L. F. Wood, GTE
"Virtual wires: overcoming pin limitations in FPGA-based
     logic emulators,"
     J. Babb, R. Tessier, A. Agarwal, MIT
"Architectural tradeoffs in field-programmable-device-based
     computing systems"
     P. Chan, M. D. F. Schlag, UC Santa Cruz

Applications I
---------------------------------------------------------
"Data folding in SRAM configurable FPGAs"
     P. W. Foulk, I. D. Hodson, Heriot-Watt U
"Text searching on Splash 2"
     D. Pryor, M. Thistle, N. Shirazi, Supercomputing Research Center
"A digit-recurrence square root implementation for FPGAs"
     M. E. Louie, M. D. Ercegovac, UCLA

=====================================================================
                                                           (3/25/93)

Applications II
---------------------------------------------------------
"Searching genetic databases on Splash 2"
     D. T. Hoang, Brown U
"Hardware acceleration of divide-and-conquer paradigms: a case study"
     W. Luk, V. Lok, I. Page, Oxford U
"Arithmetic benchmarks for the CLi6000"
     F. Furtek, Concurrent Logic
"A stochastic neural architecture that exploits dynamically reconfigurable
     FPGAs"
     M. van Daalen, P. Jeavons, J. Shawe-Taylor, U London

OTHER SESSIONS:

A discussion session will take place on the general issue of
programming FPGA-based computers.  Very short presentations of
"opinion" regarding methodologies, the nature and source of
programming tools, languages, etc., and ample time will be left
for an active discussion. 

A brief session from vendors is being scheduled. 

The workshop will conclude with an open discussion on the topic,
"Where do we go from here?"

=====================================================================

A proceedings will be published by the IEEE Computer Society;
this workshop is sponsored by the IEEE Computer Society and the
TC on Computer Architecture.  The proceedings will be available
sometime in the summer of 1993 from the IEEE Computer Society Press.

Further information can be obtained from either of the co-chairs.
Registrations including payment should be submitted to Duncan Buell.
Individuals wishing to be put on an email list for further information
about this workshop should send email with name, regular mail address,
and email address to Duncan Buell.

CoChairs:   Ken Pocek (west coast)     Duncan Buell (east coast)
            Intel                      Supercomputing Research Center
            Mailstop RN6-18            17100 Science Drive
            2200 Mission College Blvd. Bowie, Maryland 20715
            Santa Clara, CA  95052     301-805-7372                      
            408-765-6705               301-805-7602 (fax)                      
            408-765-5165 (fax)         duncan at super.org            
            kpocek at sc.intel.com

ORGANIZING COMMITTEE:
Lynn Abbott , VPI           Fred Furtek, Concurrent Logic  
Jeffrey Arnold, SRC         Leon Maissel, IBM  
Peter Athanas, VPI          Richard Newton, 


More information about the Comp-bio mailing list